[XEN][POWERPC] Flush the ERAT very early on secondary processors.

This patch solves the problem with the "Synchronizing timebase hang"
that both SMP and "nosmp" users have experienced.  It blows away the
ERAT but performing an SLBIA in the seconadry processor "spinup" code.
Signed-off-by: Amos Waterland <apw@us.ibm.com>
Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
--HG--
extra : transplant_source : 8%17%C8L%B7%E8%16GW%80B%D3%E7%25%94%1E%E5%F2LQ

diff --git a/xen/arch/powerpc/powerpc64/exceptions.S b/xen/arch/powerpc/powerpc64/exceptions.S
index 8b3c9e9fee0f7f86f53b7cdc03ee68a698b771a3..08b99b784535264f3644e08f9b136a43d6f6c691 100644 (file)
--- a/xen/arch/powerpc/powerpc64/exceptions.S
+++ b/xen/arch/powerpc/powerpc64/exceptions.S
@@ -564,7 +564,11 @@ _GLOBAL(sleep)
  */    
     .globl spin_start
 spin_start:
-
+    /* We discovered by experiment that the ERAT must be flushed early.  */
+    isync
+    slbia
+    isync
+       
     /* Do a cache flush for our text, in case the loader didn't */
     LOADADDR(r9, _start)
     LOADADDR(r8, _etext)